CVE-2024-24853

Aug. 14, 2024, 5:49 p.m.

Tags

secure@intel.com
CWE-696
2024-08-14
CVE-2024-24853

CVSS Score

7.2 / 10

Product(s) Impacted

Intel Processor

Description

Incorrect behavior order in transition between executive monitor and SMI transfer monitor (STM) in some Intel(R) Processor may allow a privileged user to potentially enable escalation of privilege via local access.

Weaknesses

CWE-696
Incorrect Behavior Order

The product performs multiple related behaviors, but the behaviors are performed in the wrong order in ways which may produce resultant weaknesses.

CWE ID: 696

Date

Published: Aug. 14, 2024, 2:15 p.m.

Last Modified: Aug. 14, 2024, 5:49 p.m.

Status : Awaiting Analysis

CVE has been recently published to the CVE List and has been received by the NVD.

More info

Source

secure@intel.com

CVSS Data

Attack Vector

LOCAL

Attack Complexity

HIGH

Privileges Required

HIGH

Scope

CHANGED

Confidentiality Impact

HIGH

Integrity Impact

HIGH

Availability Impact

HIGH

Base Score
7.2
Exploitability Score
0.6
Impact Score
6.0
Base Severity
HIGH
CVSS Vector String

The CVSS vector string provides an in-depth view of the vulnerability metrics.

View Vector String

CVSS:3.1/AV:L/AC:H/PR:H/UI:R/S:C/C:H/I:H/A:H

References

https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01083.html
secure@intel.com